Energy-Aware Instruction Scheduling for a Configurable VLIW Architecture
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Verdict
建议先扫读摘要和方法部分。
The paper presents a compiler hardware co-design for instruction scheduling on a configurable VLIW architecture.
研究问题
The paper presents a compiler hardware co-design for instruction scheduling on a configurable VLIW architecture.
方法线索
- VLIW architecture
- instruction scheduling
- cycle-accurate evaluation
- compiler hardware co-design
对你的用途
- related work
- method comparison
可核查证据
AbstractThe paper presents a compiler hardware co-design for instruction scheduling on a configurable VLIW architecture.
量化结果
- Cycle-accurate evaluation reports an 11% energy reduction while maintaining throughput on the selected workloads.
仍需核实
- 定量结果和方法细节需要从全文核实。
展开原始摘要
The paper presents a compiler hardware co-design for instruction scheduling on a configurable VLIW architecture. Cycle-accurate evaluation reports an 11% energy reduction while maintaining throughput on the selected workloads.